/*!
    \file  gd32f1x0_it.c
    \brief interrupt service routines
*/

/*
    Copyright (C) 2017 GigaDevice

    2014-12-26, V1.0.0, platform GD32F1x0(x=3,5)
    2016-01-15, V2.0.0, platform GD32F1x0(x=3,5,7,9)
    2016-04-30, V3.0.0, firmware update for GD32F1x0(x=3,5,7,9)
    2017-06-19, V3.1.0, firmware update for GD32F1x0(x=3,5,7,9)
*/

#include "gd32f1x0_it.h"
#include "systick.h"
#include "modbus_bsp.h"
#include "modbus_slave.h"
/*!
    \brief      this function handles NMI exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void NMI_Handler(void)
{
}

/*!
    \brief      this function handles HardFault exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void HardFault_Handler(void)
{
    /* if Hard Fault exception occurs, go to infinite loop */
    while(1){
    }
}

/*!
    \brief      this function handles MemManage exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void MemManage_Handler(void)
{
    /* if Memory Manage exception occurs, go to infinite loop */
    while(1){
    }
}

/*!
    \brief      this function handles BusFault exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void BusFault_Handler(void)
{
    /* if Bus Fault exception occurs, go to infinite loop */
    while(1){
    }
}

/*!
    \brief      this function handles UsageFault exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void UsageFault_Handler(void)
{
    /* if Usage Fault exception occurs, go to infinite loop */
    while(1){
    }
}

/*!
    \brief      this function handles SVC exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void SVC_Handler(void)
{
}

/*!
    \brief      this function handles DebugMon exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void DebugMon_Handler(void)
{
}

/*!
    \brief      this function handles PendSV exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void PendSV_Handler(void)
{
}

/*!
    \brief      this function handles SysTick exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
#include "gd32f1x0_eval.h"

extern uint8_t rxbuffer[64];
extern uint8_t txbuffer[64];
__IO uint8_t txcount = 0; 
__IO uint16_t rxcount = 0; 
void SysTick_Handler(void)
{

    delay_decrement();
}
uint8_t x;
void USART0_IRQHandler(void)
{
    if(RESET != usart_interrupt_flag_get(EVAL_COM1, USART_INT_FLAG_RBNE)){
        /* receive data */
        x= usart_data_receive(EVAL_COM1);
	//		gpio_bit_set(GPIOB, GPIO_PIN_13);
		//	printf("%d",x); 
//	gpio_bit_reset(GPIOB, GPIO_PIN_13);
			usart_flag_clear(EVAL_COM1, USART_FLAG_RT);
			//printf("OK");
    }

//    if(RESET != usart_interrupt_flag_get(EVAL_COM1, USART_INT_FLAG_TBE)){
//        /* transmit data */
//        usart_data_transmit(EVAL_COM1, txbuffer[txcount++]);
//        if(txcount >= rxcount)
//        {
//            usart_interrupt_disable(EVAL_COM1, USART_INT_TBE);
//        }
//    }
////    if(RESET != usart_interrupt_flag_get(USART1, USART_INT_FLAG_RBNE)){
////        /* receive data */
////        //MODS_ReciveNew(usart_data_receive(USART1)) ;
////			x =usart_data_receive(USART1);
////    printf("OK");
////		}
//		if(RESET != usart_interrupt_flag_get(USART1, USART_INT_FLAG_RBNE)){
//        /* receive data */
//			x=usart_data_receive(USART1);
//			x=usart_data_receive(USART1);
//			x=usart_data_receive(USART1);
//        MODS_ReciveNew(x) ;
//			printf("%d\r\n",x);
//			    //timer_interrupt_enable(TIMER2, TIMER_INT_UP);
//			usart_interrupt_flag_clear(USART1,USART_INT_RBNE);
//			
//			usart_interrupt_disable(USART1, USART_INT_RBNE);
//			usart_interrupt_enable(USART1, USART_INT_RBNE);
//    /* TIMER2 counter enable */
//    //timer_enable(TIMER2);
//    }
//		//printf("*************");
//		
////		    USART_INT_FLAG_EB = USART_REGIDX_BIT2(USART_CTL0_REG_OFFSET, 27U, USART_STAT_REG_OFFSET, 12U),       /*!< end of block interrupt and flag */
////    USART_INT_FLAG_RT = USART_REGIDX_BIT2(USART_CTL0_REG_OFFSET, 26U, USART_STAT_REG_OFFSET, 11U),       /*!< receiver timeout interrupt and flag */
////    USART_INT_FLAG_AM = USART_REGIDX_BIT2(USART_CTL0_REG_OFFSET, 14U, USART_STAT_REG_OFFSET, 17U),       /*!< address match interrupt and flag */
////    USART_INT_FLAG_PERR = USART_REGIDX_BIT2(USART_CTL0_REG_OFFSET, 8U, USART_STAT_REG_OFFSET, 0U),       /*!< parity error interrupt and flag */
////    USART_INT_FLAG_TBE = USART_REGIDX_BIT2(USART_CTL0_REG_OFFSET, 7U, USART_STAT_REG_OFFSET, 7U),        /*!< transmitter buffer empty interrupt and flag */
////    USART_INT_FLAG_TC = USART_REGIDX_BIT2(USART_CTL0_REG_OFFSET, 6U, USART_STAT_REG_OFFSET, 6U),         /*!< transmission complete interrupt and flag */
////    USART_INT_FLAG_RBNE = USART_REGIDX_BIT2(USART_CTL0_REG_OFFSET, 5U, USART_STAT_REG_OFFSET, 5U),       /*!< read data buffer not empty interrupt and flag */
////    USART_INT_FLAG_RBNE_ORERR = USART_REGIDX_BIT2(USART_CTL0_REG_OFFSET, 5U, USART_STAT_REG_OFFSET, 3U), /*!< read data buffer not empty interrupt and overrun error flag */
////    USART_INT_FLAG_IDLE = USART_REGIDX_BIT2(USART_CTL0_REG_OFFSET, 4U, USART_STAT_REG_OFFSET, 4U),       /*!< IDLE line detected interrupt and flag */
////    /* interrupt flags in CTL1 register */
////    USART_INT_FLAG_LBD = USART_REGIDX_BIT2(USART_CTL1_REG_OFFSET, 6U, USART_STAT_REG_OFFSET, 8U),        /*!< LIN break detected interrupt and flag */
////    /* interrupt flags in CTL2 register */
////    USART_INT_FLAG_WU = USART_REGIDX_BIT2(USART_CTL2_REG_OFFSET, 22U, USART_STAT_REG_OFFSET, 20U),       /*!< wakeup from deep-sleep mode interrupt and flag */
////    USART_INT_FLAG_CTS = USART_REGIDX_BIT2(USART_CTL2_REG_OFFSET, 10U, USART_STAT_REG_OFFSET, 9U),       /*!< CTS interrupt and flag */
////    USART_INT_FLAG_ERR_NERR = USART_REGIDX_BIT2(USART_CTL2_REG_OFFSET, 0U, USART_STAT_REG_OFFSET, 2U),   /*!< error interrupt and noise error flag */
////    USART_INT_FLAG_ERR_ORERR = USART_REGIDX_BIT2(USART_CTL2_REG_OFFSET, 0U, USART_STAT_REG_OFFSET, 3U),  /*!< error interrupt and overrun error */
////    USART_INT_FLAG_ERR_FERR = USART_REGIDX_BIT2(USART_CTL2_REG_OFFSET, 0U, USART_STAT_REG_OFFSET, 1U),   /*!< error interrupt and frame error flag */


//				if(RESET != usart_interrupt_flag_get(USART1, USART_INT_FLAG_RBNE_ORERR)){
//					printf("USART_INT_FLAG_RBNE_ORERR\r\n");
//				}


}

//void USART1_IRQHandler(void)
//{
//    if(RESET != usart_interrupt_flag_get(USART1, USART_INT_FLAG_RBNE)){
////			gpio_bit_set(GPIOB, GPIO_PIN_13);
//        /* receive data */
//        x= usart_data_receive(USART1);
//			
//			//printf("%d",x); 

//			usart_flag_clear(USART1, USART_FLAG_RT);
////			gpio_bit_reset(GPIOB, GPIO_PIN_13);
//			//printf("OK");
//    }
//}
void delay(int time)
{
    while(time--);
    
    return;
}
extern unsigned char TFLAG ;


void TIMER2_IRQHandler(void)
{
    if(SET == timer_interrupt_flag_get(TIMER2, TIMER_INT_FLAG_UP))
			{		
				MODS_RxTimeOut();
				timer_interrupt_flag_clear(TIMER2, TIMER_INT_FLAG_UP);
				timer_disable(TIMER2);
      }
}